A server has a PCIe 5.0 x1 lane. What is the theoretical bandwidth?

The theoretical bandwidth of a PCIe 5.0 lane is determined by its raw data rate and encoding scheme. PCIe 5.0 specifies a raw data rate of 32 Gigatransfers per second (GT/s) per lane. It uses a 128b/130b encoding scheme, meaning for every 130 bits transmitted, 128 bits are actual data. The calculation for a single (x1) lane is: (32 GT/s (128/130 encoding efficiency)) / 8 bits per byte ≈ 3.94 GB/s. This represents the maximum theoretical data throughput for a single PCIe 5.0 lane.

B. 1.97 GB/s: This is the correct theoretical bandwidth for a PCIe 4.0 x1 lane (16 GT/s), not a PCIe 5.0 lane.
C. 7.88 GB/s: This is the theoretical bandwidth for a PCIe 5.0 x2 (two-lane) configuration, not a single x1 lane.
D. 0.98 GB/s: This is the correct theoretical bandwidth for a PCIe 3.0 x1 lane (8 GT/s), not a PCIe 5.0 lane.

1. Dell EMC Documentation: Dell PowerEdge R760 Technical Guide, Version 1.0, March 2023. Section 4.3 "PCIe", Page 23. The document states, "PCIe Gen5 provides 32 GT/s of bandwidth, which is double that of PCIe Gen4." This confirms the base transfer rate used in the calculation.

2. Official Vendor Documentation: PCI-SIG, "PCI Express® 5.0 Specification Frequently Asked Questions," May 29, 2019. This official document from the standard's governing body confirms the key specifications: "The PCIe 5.0 specification supports 32.0 GT/s... The PCIe 5.0 specification will continue to use the 128b/130b encoding scheme..." (Questions: "What is the data rate of the PCIe 5.0 specification?" and "What is the encoding scheme for the PCIe 5.0 specification?").